1. Field of the Invention
This invention relates generally to high-bandwidth communication using CMOS integrated circuits, and more particularly to a system for communicating between circuit components.
2. Background of the Invention
Semiconductor integrated circuits used in digital computing and other digital applications often use a plurality of VLSI circuits interconnected by single or multi-segmented transmission lines for binary communication. Conventional transmission lines include traces, which are formed on a suitable substrate, such as a printed circuit board (PCB). In higher performance memory systems, the data is sent as a burst on both edges of the clock to reduce power and increase the peak bandwidth in DDRDRAMs and RDRAMs. To build large and wide data busses, conventional memory systems use multiple DRAM components. However, the variation between the individual DRAM components can be large, especially if different vendors manufacture the components. This limits the operating frequency of these large memory systems.
Further, with the advent of data communication techniques that offer data transfer rates greater than one gigahertz, skew between circuit (e.g., DRAM) components becomes even more troublesome. Examples of data communication techniques offering data transfer rates over one gigahertz are described in the copending patent applications identified above in the cross-reference to the related applications. It will be appreciated that this problem gets worse as the operating frequency of integrated circuits increases according to Moore's Law, without comparable improvement in packaging and printed circuit boards technology.
Thus, there is now a need for a system and method for transmitting, receiving and synchronizing data between multiple DRAM components at high frequency even when the skew between different components is higher than the data rate.